The whole model lives on the chip.
A chip built around the models it runs. The whole model sits on the chip, so it never fetches weights from off-chip memory.
~7,000–8,000tokens/s, one userBefore siliconest. A B200 on a standard engine serves the same model at ~890measured. A tuned GPU engine narrows the gap, and can match us on structured outputest.
OVERLAYCONCEPT · NOT SILICON
IN · embedOUT · head
+ sampler
+ sampler
Serving one user, a GPU waits on memory.
It fetches the weights from memory every step. Ours stay on the chip.
A GPU, serving one user
B200 · one user · standard engine~890 tok/ssame modelmeasured
The Overlay chip
Overlay · one user · pre-silicon~7,000–8,000 tok/ssame modelest.
Every weight on the chip, in SRAM.
Today we build the chip and its compiler around released models. Next, we co-design the model with the chip. Our first chip is all-SRAM, so every weight is rewritable.
Model
The model as released. Co-designed next.
Compiler
Places each part of the model.
Our SRAM die
Every weight in rewritable SRAM.
Verified
Bit-exact in simulation.
Silicon
Test chip next.
Same answer, one user, two machines.
An agent reasons through a step. Watch who finishes.
B200 · one user · standard engine~890 tok/smeasured
B200 · one user · tuned engine~2,600–4,400 tok/sest.
Overlay · one user · pre-silicon~7,000–8,000 tok/sest.
Illustrative, slowed 150×. Our speed is an estimate before silicon.
Simulated today. Silicon next.
The design runs bit-exact in simulation today. Test silicon is next. A white paper will follow when the time is right.
- NowSoftware and simulation
- NextTest silicon
- ThenThe product die
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